GTLREF -- How can we all get it right?

[h@RRy]

I've been tuning my OC and for the most part, the 1 thing I am missing is how to set an optimal GTLREF Before anyone starts linking "Freecableguy"'s guide to understanding GTLREF I understand how GTLREF is measured/applied(2/3 of CPU VTT, i.e. 1.2V x .667(67%) = .804V) and optimal GTLREF voltage for quad cores is in between 1.1 - 1.5V and dual cores is around .875V. My questions are:

1. Is there a droop associated with GTLREF?
2. Are there any other factors outside of CPU VTT that affect the GTLREF?

Any input is greatly appreciated:D

h

[virtualrain]

I'd love to understand this better, but I think it's a dark art that will likely remain that way due to a lack of interest and need.

[Aivas47a]

I spent a good bit of time fiddling with this on a DFI ICFX3200 board with a q6600. With trial and error I landed on settings that worked pretty well, but it took a huge amount of time and unfortunately each board seems to present the setting options in a different way, so that experience hasn't helped much with other boards. (I read FCG's guide a couple of times but couldn't understand it well enough to apply it.:shrug: )

[ChaosMinionX]

With the rig in my sig..... it wont boot on Maximus with anything less than .63x ref GTL for cpu and .67x ref GTL for NB.

Running 450x8 with 4GB of ram, and lots of other stuff seems to take all it can get.

[Aivas47a]

With the rig in my sig..... it wont boot on Maximus with anything less than .63x ref GTL for cpu and .67x ref GTL for NB.

Running 450x8 with 4GB of ram, and lots of other stuff seems to take all it can get.

Thanks for the tip :up:

[Crazypinoy9]

With the rig in my sig..... it wont boot on Maximus with anything less than .63x ref GTL for cpu and .67x ref GTL for NB.

Running 450x8 with 4GB of ram, and lots of other stuff seems to take all it can get.

Have you tried messing with your CPU PLL voltage? I have it set to 2.0 and i'm now i can play games all day long @ 500x8.

and i haven't even touched any of the GTL voltages yet.

[Praz]

The jury is still out on CPU PLL voltage increases. While increasing it will allow for pushing a processor past it's FSB wall all may not be good. There have been several people with dead cores after pushing nothing else hard except PLL voltage.

Most boards that follow the Intel design specs for GTL (67%), which the Abit board does, usually find that the best setting for stability with a quadcore falls somewhere between 66% and 70%.

[celemine1Gig]

BTW, Intel lists the VCCPLL absolute maximum as 1.575V. ;) So much for the dead the CPUs after pumping 2.0V VCCPLL or something in that range.

[ChaosMinionX]

Have you tried messing with your CPU PLL voltage? I have it set to 2.0 and i'm now i can play games all day long @ 500x8.

and i haven't even touched any of the GTL voltages yet.

CPU PLL from what I hear has a tremendous strain on CPU's..... Anyone confirm this? I know it can help with FSB, but overall stability at lower FSB's I dont think it has any effect.

[Crazypinoy9]

CPU PLL from what I hear has a tremendous strain on CPU's..... Anyone confirm this? I know it can help with FSB, but overall stability at lower FSB's I dont think it has any effect.

Well i think now I'm gonna I bring that nice little number down...LOL!

Someone told me different....trial and error right? Now i know what NOT to touch.:yepp:

[ChaosMinionX]

Well i think now I'm gonna I bring that nice little number down...LOL!

Someone told me different....trial and error right? Now i know what NOT to touch.:yepp:

I personally use 1.6v for CPU PLL and increase to 1.7ish for 500mhz FSB..... Hope that helps

Been using 1.5-1.6v as a standard base PLL voltage, seems to have done me justice with 3 Mobos now.

[h@RRy]

My point of contention is, we keep upping the volts for the usual suspects(CPU, RAM, NB) but there has to be a correlation between how many volts are used for those settings and the percentage of GTLREF to use.
For example, I'm P95 stable@3.6 using 1.54 on the CPU, 1.52 on the NB, 2.2 on the RAM, and 68% GTLREF; if I up either the NB or VTT I am not P95 stable even for 5 minutes, but if I drop(yes drop)the GTLREF to 66% I will be *almost* stable as 1 of the cores drops off at 5hrs.
So there is definitely *some* relational factor between the way VCORE, VDIMM, NBV, and SBV affect GTLREF(Droop associated?), but where?

Check this out:
http://www.anandtech.com/mb/showdoc.aspx?i=3129&p=12
http://www.anandtech.com/mb/showdoc.aspx?i=3129&p=13
http://www.anandtech.com/mb/showdoc.aspx?i=3129&p=14

I think this is probably the most comprehensive info I have seen in regards to how GTLREF applies in regard to practical usage(DFI'ers got it gooood)
From looking at those tables and the settings, the only difference I see from board to board is the amount of mV(?) used per increment. Although I believe it is between .00135(might be another 0) and .00148(might be another 0)so that may explain why for some boards the best stable GTLREF is lower (or higher) than the prescribed 67%. Guys we NEED to figure this out.
I "really" need a DMM...
Soooo, For the most part I think it deals more specifically with voltage regulation than actual clock yield(s). So in theory, if the GTLREF is optimally regulated(assuming theres no droop that comes with it)then it won't increase clock headroom but stabilize the FSB of said clock, this *might* potentially increase the FSB OC, although not the max speed the chip can run at.
But then again, I could be wrong:)

[cadaveca]

You kinda got it harry. GTL tweaking is adjusting the "span" between a low and high signal, low being 0, high being one(or the other way around, I dunno).

Anyway, as we increase clocks, the cpu may not be able to match this drop, or it may cause a drop larger than what is set, thereby triggering a "false" 0, fractions of a millisecond early...and thereby destroying stability. So we tweak this to get it jsut right...signal is not read to early, or too late, but this is a function that almost changes as clockspeed increases, not jsut FSB, as the timing left @ high FSB/clockspeeds is less than it would be for a slower speed...so maybe you never get down to .63%, and then never get a 0...

To me, this last line is where cpu's "Wall".

[h@RRy]

You kinda got it harry. GTL tweaking is adjusting the "span" between a low and high signal, low being 0, high being one(or the other way around, I dunno).

Anyway, as we increase clocks, the cpu may not be able to match this drop, or it may cause a drop larger than what is set, thereby triggering a "false" 0, fractions of a millisecond early...and thereby destroying stability. So we tweak this to get it jsut right...signal is not read to early, or too late, but this is a function that almost changes as clockspeed increases, not jsut FSB, as the timing left @ high FSB/clockspeeds is less than it would be for a slower speed...so maybe you never get down to .63%, and then never get a 0...

To me, this last line is where cpu's "Wall".

Indeed, so then technically a droop could impact this setting.
I didn't think I was that far off, thanks for the input cadaveca:up:

[celemine1Gig]

There is no droop with GTLREF and GTLREF has absolutely nothing to do with VDroop that is part of the VCore circuit. ;)

[newls1]

I just want to ask this question: Im using a P35 P5K-DLX motherboard in conjunction with a Q6600 @ 3.77GHz (417x9) I have totally left CPU PLL voltage, and the GTLREF ( I think) voltages @ AUTO and the computer is totally stable. Did I just get lucky, or is this normal?