Fud - Nehalem Will Get 8 cores at 45nm in 2H 2009, Confirmed.

[AuDioFreaK39]

http://www.fudzilla.com/index.php?option=com_content&task=view&id=9471&Itemid=1



Things to note:

It will have a lot of cache
It will come at significantly lower frequency compared to Bloomfield
We probably won't see these as desktop chips

[savantu]

http://www.fudzilla.com/index.php?option=com_content&task=view&id=9471&Itemid=1

No ; this is the XEON MP for servers with 4 or more sockets.Xeon MP ( or EX nowadays ) takes far longer to validate than Xeon DP and desktop parts , thus it typically arrives 9-12 months after those.

8 cores , 24MB L3 cache , 4 QPI links , 2 FBDIMM dual channel IMCs ( thus Quad Channel memory )for 34GBs of memory BW.

[fellix_bg]

With the current estimation of 246 sq.mm for the 4-core Bloomfield (45nm), doubling the number to eight would yield near 400 sq.mm and this is without touching the size of the L3 cache, which I doubt will stay at the shy 8MB mark for that monster.

[informal]

Any guesses will these be MCM or monolithic?If intel decides to produce these @ 45nm and goes monolithic route,it will be one big chip(500mm2 ?),larger than Dunnington.

[Shintai]

Any guesses will these be MCM or monolithic?If intel decides to produce these @ 45nm and goes monolithic route,it will be one big chip(500mm2 ?),larger than Dunnington.

Mono. Shouldnt be much harder to make than Itaniums. And these will sell for 1300-2700$

[Blauhung]

Any guesses will these be MCM or monolithic?If intel decides to produce these @ 45nm and goes monolithic route,it will be one big chip(500mm2 ?),larger than Dunnington.

monolith just like dunnington.

I've seen them and they're huge

Mono. Shouldnt be much harder to make than Itaniums. And these will sell for 1300-2700$

and yeah, about the same size as Tukwilla (itanium 2) on 65nm

[informal]

If it is monolithic and done at 45nm than it will be pricey indeed.Top Dunington sells for 2.7K+ now,so similarly clocked 8C Nehalem server part will be probably near or over that price.

[Sampsa]

this was all told and shown in IDF one month ago..

Some offical info about Intel's plans: http://download.intel.com/pressroom/kits/events/idffall_2008/SSmith_briefing_roadmap.pdf

Nehalem EX is the 8 cores / 16 threads version.

[BulldogPO]

I just want to see naked core comparet to wolfdale :)

[bowman]

Gelsinger even held up a wafer with these at IDF. When is someone going to slap the Fudzilla guys and tell them to please stop posting old info as if it's new? It gets tiring..

http://www.isarapix.org/pix64/1221646110.png

[FischOderAal]

Each square is only one processor?

http://img.skitch.com/20080917-r3k82wd2j44bbuds1bpp4nj5ae.preview.jpg (http://skitch.com/fischoderaal/sgq5/huge)
Click for full size (http://skitch.com/fischoderaal/sgq5/huge) - Uploaded with plasq (http://plasq.com)'s Skitch (http://skitch.com)

[fellix_bg]

http://img141.imageshack.us/img141/1736/69934318pz8.png

All eight cores are clearly distinguishable in this zoomed cropping (as it seems to me), but I can't figure out where should be the L3 array... too blurry. ;)

[[XC] gomeler]

Maybe it's on-package L3? Kind of like the Power6(I think) processors have dedicated cache on the actual package.

Those cores are huge! Compare his fingers to the cores.. *gasp*

[Shintai]

Or the L3 could be in between the cores.

[fellix_bg]

I've counted 81 integral pieces on that wafer -- that's less from the number of G200 chips that can fill the same area, which suggests a die-size of more than 600 sq.mm! From a 45nm Fab that size would be quite pricey.

Now, about the cores, I'm thinking of the following structure:

http://img209.imageshack.us/img209/7296/49180826rx8.png

In a nutshell, all the cores are placed in the middle, grouped by two (their rectangular shape is quite stretched, if you remember the Bloomfield die-shot), while the L3 array is partitioned in four blocks (4*4MB). Everything else is interconnect and I/O logic.

By the way, this layout resembles quite well the UltraSparc-T2 one. ;)

[Jacky]

It's supposed to have more than 16mb cache, though.

[Polizei]

"FUD" and "confirned" do not belong in the same sentence.

[fellix_bg]

Err, how about "confirmed FUD"? :D

[Blauhung]

I've counted 81 integral pieces on that wafer -- that's less from the number of G200 chips that can fill the same area, which suggests a die-size of more than 600 sq.mm! From a 45nm Fab that size would be quite pricey.

Now, about the cores, I'm thinking of the following structure:

http://img209.imageshack.us/img209/7296/49180826rx8.png

In a nutshell, all the cores are placed in the middle, grouped by two (their rectangular shape is quite stretched, if you remember the Bloomfield die-shot), while the L3 array is partitioned in four blocks (4*4MB). Everything else is interconnect and I/O logic.

By the way, this layout resembles quite well the UltraSparc-T2 one. ;)

yup, although I think the cores are actually next to each other horizontally rather then vertical

[AliG]

honestly, althought this is good news, I really could care less, simply because I know for sure that I won't be able to make use of 8 cores, let alone 16 threads

[fellix_bg]

I've done some math here, and I can almost bet that the die-size of this thing is 660 sq.mm with minor deviations. :D
Bear in mind, that Tukwila (the quad-core Itanium) is just below the 700 sq.mm mark!

[VIctorj]

A lot of cache, really specific.

[bowman]

I've done some math here, and I can almost bet that the die-size of this thing is 660 sq.mm with minor deviations. :D
Bear in mind, that Tukwila (the quad-core Itanium) is just below the 700 sq.mm mark!

Yep, but Tukwila is 65nm..

Will be interesting to hear the transistor count.

[Shintai]

Yep, but Tukwila is 65nm..

Will be interesting to hear the transistor count.

Depends on cache. But else something between 1.2 and 1.4billion if its 16MB I think.

[clayton]

8 cores @ 3.0ghz with 45w TDP is just dreamy. Hmmmm.

[Donnie27]

yup, although I think the cores are actually next to each other horizontally rather then vertical

That's what I was thing as well. I remember this old slide.

http://news.cnet.com/8301-13924_3-10032313-64.html

Cool pics for us folks who don't work at Intel.

http://www.intel.com/pressroom/archive/releases/20080317fact.htm?iid=search


Didn't some one say the 8 core model was the same size as the old 486?

[LordEC911]

8 cores @ 3.0ghz with 45w TDP is just dreamy. Hmmmm.
Not happening anytime soon...

So any idea why Intel isn't waiting to do these on 32nm?
No desktop obviously means they can price these at whatever they want and still have a huge profit margin but still, these die size estimates of 400-650mm2 is slightly alarming though I guess Itanium is the same.

So 32nm for desktop 8core mono?

[Movieman]

Not happening anytime soon...

So any idea why Intel isn't waiting to do these on 32nm?
No desktop obviously means they can price these at whatever they want and still have a huge profit margin but still, these die size estimates of 400-650mm2 is slightly alarming though I guess Itanium is the same.

So 32nm for desktop 8core mono?

I don't think they are ready yet for 32nm..
That is still a year or so away..

[T_Flight]

Each square is only one processor?

http://img.skitch.com/20080917-r3k82wd2j44bbuds1bpp4nj5ae.preview.jpg (http://skitch.com/fischoderaal/sgq5/huge)
Click for full size (http://skitch.com/fischoderaal/sgq5/huge) - Uploaded with plasq (http://plasq.com)'s Skitch (http://skitch.com)


Yummy! Smores! I'll take 3! :D

I would love to have one of those and would love to see what I could do with FAH. Unfortunately I won't be having any of those at a 2000 dollar picetag though. :(

Hoping for the day when they come out with the 500-700 dollar model. I'll buy it and promise not to eat it too! :yepp:

[Bo_Fox]

http://img141.imageshack.us/img141/1736/69934318pz8.png

All eight cores are clearly distinguishable in this zoomed cropping (as it seems to me), but I can't figure out where should be the L3 array... too blurry. ;)

Wow, that's my first time seeing the etched silicon wafers. What I do not get is that the chips near the edges are cut-off (or "sawed-off") right at the outer edge of the silicon wafer. So, does that mean the microprocessors are etched all the way to the edge of the wafer regardless of whether or not it would be a complete, fully-functional CPU? That would be a huge waste in manufacturing (time, energy, and expense)...

Sorry if I'm a noob at this.. but somebody gotta ask questions.

[clonez]

i guess the lithography matrixes are smaller than the wafer

(like 4x4 processors in that example), so it has to be shifted in order to access the whole wafer space (and the processors are cut off at the corners)

when it is possible to put the maximum of processors onto a wafer (useing these 2x2 or 4x4 matrixes) without wasteing the edges, then shure, it will be done

[Blauhung]

Wow, that's my first time seeing the etched silicon wafers. What I do not get is that the chips near the edges are cut-off (or "sawed-off") right at the outer edge of the silicon wafer. So, does that mean the microprocessors are etched all the way to the edge of the wafer regardless of whether or not it would be a complete, fully-functional CPU? That would be a huge waste in manufacturing (time, energy, and expense)...

Sorry if I'm a noob at this.. but somebody gotta ask questions.

yup

It's not really a waste as much as one would think because just about every step in the process is something that happens equally to the entire wafer no matter what you do. The only steps that actually are aligned to the wafer come from lithography where the actual patterns for each layer are set down to be etched or plated into. In these the frame that is "shot" onto the wafers normally are about 2X2 or 2X3 die in the case of the smaller products. Because we normally have several die on a shot, we will even do the shots that fall off the edge because most of the time one of the die in the corner of the shot will land where it could produce a yielding die.

Taking these extra shots only accounts for some small amount of wasted time really. Out of the whole litho process for one wafer, they probably only add about 1-2% on to the cycle time.

[bowman]

Not happening anytime soon...

So any idea why Intel isn't waiting to do these on 32nm?
No desktop obviously means they can price these at whatever they want and still have a huge profit margin but still, these die size estimates of 400-650mm2 is slightly alarming though I guess Itanium is the same.

So 32nm for desktop 8core mono?

32nm uniprocessor desktop SKU will be monolithic six-core.