Cellshock @833Mhz 6-5-4-15 1T

[eva2000]

Playing with beta bioses for DFI LP UT X48-T3RS and Sascha would be pleased to know the Cellshock PC3-14400 are now working :)

Using DDRAM Default Skew Model 0 (default)

http://fileshosts.com/intel/DFI/DFI_UT_X48_T3RS/results/Nautilus500/E8500_Q740A493T_1808/cellshock/14400/8x/400_1333/1t/AFD_500-833_65415-A-52-pl9_eaeee_12-12_odt1_3_allauto_1.3375-2-1.655-1.35_model0/spi32m_11m37s954ms.png

click image for full screenshot
http://fileshosts.com/intel/DFI/DFI_UT_X48_T3RS/results/Nautilus500/E8500_Q740A493T_1808/cellshock/14400/8x/400_1333/1t/AFD_500-833_65415-A-52-pl9_eaeee_12-12_odt1_3_allauto_1.3375-2-1.655-1.35_model0/hd3850cf/3dmark06_810_1000_18333_tn.png (http://fileshosts.com/intel/DFI/DFI_UT_X48_T3RS/results/Nautilus500/E8500_Q740A493T_1808/cellshock/14400/8x/400_1333/1t/AFD_500-833_65415-A-52-pl9_eaeee_12-12_odt1_3_allauto_1.3375-2-1.655-1.35_model0/hd3850cf/3dmark06_810_1000_18333.png)

Weird part is memtest86+ v2.01 reports 400/1333 divider as 400/1200 for 750mhz speeds and not 833mhz, and super pi 32m seems slow for those clocks by 15-25s taking into account loose tRD PL.

Hopefully will get to bottom of this :)

[Gautam]

Damn, tRP 4 on DDR3. What voltage?

[eva2000]

2.00v vdimm set in bios :)

[George_o/c]

Only 2.00v Vdimm ? :eek:
Can't imagine what it can do with more than 2.25v ... Please tell me you will check that out and tell us :) :p:

[M.Beier]

Looks good Eva... :D
And now tell me, dont you prefer running them like this instead of 1000 CL7-7-7-15? ;)

[scooter.jay]

Nice clocks at those timings.:clap: