AMD K11 Rundown "Bazooka"

[Monkeywoman]

"As the well-informed colleagues of Planet3DNow! Learn, AMD will successor at K10 (we think K11) to the basic design of the AMD K6 back. Short memory or to those who are too young to recall to the K6. The AMD K6 was mid to late 90s manufactured, had one of the highest IPC (to a good efficiency per clock) of all x86 CPUs and AMD was already a big step further in the world market.

Who is now something about wondering why a man about 10 years old design again wants to be the one recalled. Intel Core2 processors are based fundamentally on the Pentium III, of course, were the latest techniques (command sets, etc.) are inserted and bottlenecks eliminated.

The big advantage of the K6 was only 6 classify long pipeline, an intelligent Branch-Predictor and then times very large TLB. After parts of the slow-speed FPU, and a very bad / slow connection to the infrastructure and bad Taktbarkeit. Therefore, the K6 also often its performance is not off, as simply too little data to the CPU came. But enough of the K6 ;)

By HT3.0, the problem with the connection already been solved and things FPU AMD has also made great progress, and problems resolved Speed Path = higher stroke. That would be the biggest weaknesses remedied, but still much to do. Of course, even at K11 new command sets (by SSE to SSE5, X86-64, etc.) to use new manufacturing processes (45nm SOI based on germanium), a 512Bit connected with, and with full CPU operated 256KB L2 cache, and 8MB L3 cache to .

Since the times of K6 from 250nm to 180nm manufacturing processes, is the number of transistors also quite small. Thus, a K11 core merely 24Mio transistors (to just 5 mm ²), to come across yet IMC CPU, Northbridge, and the 8MB shared L3 cache. For comparison, a recent AMD K8 dual core with 2x 512KB cache has 184MIo transistors.Some are perhaps already on this, which I also would like to.

AMD is in a position many nuclei at K6 usual small TDP to a very small area DIE-to get. The CPU is therefore very cheap to produce and is only about 90Watt unter Volllast aller 16 Kerne benötigen. 90Watt under full load of 16 cores. A dual-core for mobile applications to be easily 10Watt coming!

This allows AMD to offer low cost many models, and a large part of the market covered. The clock rates should begin to lie about 2Ghz, later. All the fun will begin at the end of 2009. Incidentally, the new AMD core landed on the name "Bazooka". Even by the Swift M CPUs known space is used. It is also the integration of GPU cores, etc. At the conclusion that even the mention everything but still more unconfirmed rumors. However, Planet3DNow! Not really known for false reports and the information sounds realistic. And now, a comparison of the old K6 III and the planned K11, and an AMD slide."

translated with google

source in German, http://www.ati-forum.de/general/news/411-amd-greift-beim-%E2%80%9Ek11%E2%80%9C-auf-den-k6-zur%C3%BCck/

first pic is K6, second is K11 and last is Desgin

[Entity_Razer]

My brain hurts now.... Someone please translate to proper english for us? :D

[Frank M]

It's already april 3 here...
:D

Why K11? Why not K6×2=K12 :D

Strange concept... worked for intel, but they just based it off an old chip,
and not multiplied it by 16.

[justapost]

However, Planet3DNow! Not really known for false reports and the information sounds realistic. And now, a comparison of the old K6 III and the planned K11, and an AMD slide."

It was written on 1.April. :rolleyes:

[[XC] gomeler]

Wait.. seriously? So basically we are looking at a 45nm K6 core times 6 and mashed together with an IMC? Are we also looking at 600MHz operating speed? Seriously I hope this is a killer chip, but something in the back of my head is going "bad idea is bad"

edit: damnit, I thought we were done with April Fool's. There goes my hope for something not based on Phenom.

[Rock&Roll]

The first post at that link was made on April first. i Think that's the only line of text matters.

[Monkeywoman]

just because it was written on april 1st doesn't mean its fake. look at the pics, looks like some time was put into them. this could work. done at 45nm and having each chip running at 1Ghz would be fast. amd doesn't have much bottle neck because of their hyper transport bus...looks plausable

[Zytek_Fan]

My brain hurts now.... Someone please translate to proper english for us? :D

edit: LOL, nevermind.
April Fools' prank.

[Frank M]

just because it was written on april 1st doesn't mean its fake.

Even the OP says later on that it was an Aprilscherz ;)

[Monkeywoman]

Even the OP says later on that it was an Aprilscherz ;)

i'm trying to be optimistic here :p:

[Kingcarcas]

Damn you! Here i thought i was getting a genius breakdown on processors :ROTF:

[nullface]

Hehe even the name Bazooka made me think april 1.

[AliG]

even though its an april fools joke, $5 says that if amd actually went back towards the k6 design and made the world's smallest 16 core cpu with a decent ipc, they would make far more than they ever will with phenom simply because the general market would be dumb enough to think a piece of crap 16 core cpu would be better than a monster 4 core cpu. Not to mention 5mm^2 is damn cheap to produce:D

[Frank M]

the general market would be dumb enough to think a piece of crap 16 core cpu

Gee I dunno, the Core uArch seems to be doing just fine while it's based
on a piece of crap P!!!... ;)

[[XC] Lead Head]

The Current Phenom traces its routes back to the original Athlon, and if I remember correctly, the Athlon shares some technology with the DEC Alpha.

I did have a few K6-1s, they were alright CPUs. I heard the later K6-3s that had onboard L2 cache weren't actually that bad, but the K6's pathetic FPU is what limited it.

[villa1n]

in theory, it could work.. in theory... ^^

[[XC] Oj101]

Someone forward this to AMD please, I bet we'll see this soon :ROTF:

[awdrifter]

Seems like April Fools to me. There's no way a 1GHZ processor can keep up with the upcoming 3-4ghz Intels. But the idea is plausible I guess. Take something that's higher IPC and tweak it from there. If it has higher IPC than today's Phenom, and somehow they get it up to 2.5ghz or even 3ghz like the B3 Phenoms, then it could work.

[halo112358]

I love how going from K10 -> K6+++ is theoretically an improvement....

someone please close this, it's going to get old hearing about this for the next year.

[largon]

I can't believe people are seriously thinking this could be true...
SNAP OUT OF IT!

I'm not even going to post the links to the AMD Analyst Day PDFs they photochopped as this prank is so obvious.

[FischOderAal]

IT IS A JOKE! IT IS NOT TRUE!

see here:
http://www.planet3dnow.de/cgi-bin/newspub/viewnews.cgi?id=1207071917


Unsere Lesen haben es natürlich schnell bemerkt: die heutige Meldung AMD greift beim Phenom-Nachfolger auf K6 Design-Elemente zurück war nur ein Gedankenspiel unsererseits. Dennoch darf AMD "unsere" CPU in der Mittagspause gerne mal probeweise nachbauen, um zu sehen welches Potenzial in diesem 16-K6-Cores-mit-Phenom-Infrastruktur-Verschnitt steckt ;) Mit Planet 3DNow! Aprilscherzen muss man ohnehin vorsichtig sein wie Stammleser wissen, denn unser 2004er Aprilscherz AMD Ultron64 "Dual-Core" wurde anderthalb Jahre später ebenso Realität, wie es der Aprilscherz Barcelona mit integrierter R600 Grafik in abgewandelter Form beim Swift werden wird. Daher liebe K6-User: die Shugashack-DLLs für Quake III noch nicht wegwerfen, die braucht Ihr vielleicht nochmal ;)

[saaya]

at this stage id say there are only vague ideas about this cpu in the heads of some people at amd... so this is pretty much just marketing...

and it sounds really boring to be honest...

[w0mbat]

BUT: P3DNow´s april fools joke 2004 was a dual-core K8 which became reality, the also had a GPU+CPU "fusion" last year as a prank and it´ll become soon real too.

[hardrail]

Not to mention that the architecture that was just describes sounds exactly like the Nehalem architecture.

[fcry64]

Not to mention that the architecture that was just describes sounds exactly like the Nehalem architecture.

:rofl: :rofl:

[xlink]

makes sense. silicon is being pushed to the limits and clock speed scaling isn't going to well for either side if you hadn't noticed. AMD's only real hope is for higher performance/clock.

if (P6 + netburst = core)
then
(k6 + k7 + IMC = k11)

it could work rather well.

think about it say an average of 50m/core * 16, that's "only" 800m transistors(assume more cache updated uarch IMC etc.)

[KTE]

Hehe what a gimmick :D

[Donnie27]

I thought it was a sweet prank!

[saaya]

if (P6 + netburst = core)

core =! p6 plus netburst!

lets compare netbursts main characteristics to core

netburst _ core
double pumped alus = nope
low ipc = high ipc
high clockspeeds = low clockspeeds
tiny l1 cache = large l1 cache
huge l2 cache = medium l2 cache
hyper threading = nope
quad pumped bus = yes

the only thing core and netburst have in common is that they are intel processors and that they use the same system interface... and you really cant expect to change the interface AND the architecture at the same time, that would be like asking for trouble.

id say:

banias = p6 1.10
dothan p6 1.11
yonah = p6 1.20
core = p6 v1.21
core2 = p6 v1.22
nehalem = p6 1.3

[Shintai]

core =! p6 plus netburst!

lets compare netbursts main characteristics to core

netburst _ core
double pumped alus = nope
low ipc = high ipc
high clockspeeds = low clockspeeds
tiny l1 cache = large l1 cache
huge l2 cache = medium l2 cache
hyper threading = nope
quad pumped bus = yes

the only thing core and netburst have in common is that they are intel processors and that they use the same system interface... and you really cant expect to change the interface AND the architecture at the same time, that would be like asking for trouble.

id say:

banias = p6 1.10
dothan p6 1.11
yonah = p6 1.20
core = p6 v1.21
core2 = p6 v1.22
nehalem = p6 1.3


You are wrong on a few points. Core got same or bigger L2. The trace cache was actually about the same size as current L1.

Core and up is NOT a P6 1.x Its a whole new thing. Core and Core 2 is absicly the best from P-M and P4 mixed in a bowl with a huge mix of new things aswell. Also Yonah=Core :p:

[[XC] NetburstXE]

It's already april 3 here...
:D

Why K11? Why not K6×2=K12 :D

Strange concept... worked for intel, but they just based it off an old chip,
and not multiplied it by 16.

LOL. I still have an old K6. The thought that AMD's newest CPU would just be two of these glued together is just hilarious.

[RAW-Raptor22]

core =! p6 plus netburst!

lets compare netbursts main characteristics to core

netburst _ core
double pumped alus = nope
low ipc = high ipc
high clockspeeds = low clockspeeds
tiny l1 cache = large l1 cache
huge l2 cache = medium l2 cache
hyper threading = nope
quad pumped bus = yes

the only thing core and netburst have in common is that they are intel processors and that they use the same system interface... and you really cant expect to change the interface AND the architecture at the same time, that would be like asking for trouble.

id say:

banias = p6 1.10
dothan p6 1.11
yonah = p6 1.20
core = p6 v1.21
core2 = p6 v1.22
nehalem = p6 1.3

P6 1.0 was Pentium Pro
P6 1.02 Was Pentium II
P6 1.05 was early Pentium III
P6 1.08 was PIII-s

Its all the same


LOL. I still have an old K6. The thought that AMD's newest CPU would just be two of these glued together is just hilarious.

yep, I actually have 2... a 300MHz K6 and a 475MHz K6-2... :rofl:

[Nedjo]

LOL. I still have an old K6. The thought that AMD's newest CPU would just be two of these glued together is just hilarious.

yes, these were the times my friend :)

basically K6 and it's derivate K6-2 and K6-3 were sawing straw for AMD after disastrous K5 era. They ere neat chips...

K6-2: http://www.lostcircuits.com/cpu/k63+/k62.jpg K6-3: http://www.lostcircuits.com/cpu/k63+/k63+.jpg (basically K6-2+OnDie 256Kb L2)

produced in 250nm K6-2 was 81 sq mm big die... so if it would be produced in upcomming 45nm tech, theoreticaly it's size would be 14.7 sq mm! And acording to Hans De Vries size of Daneb's Core is 15.3 sq mm (L2 excluded)!!

[Anavel0]

I hate April . . .

[gOJDO]

core =! p6 plus netburst!

lets compare netbursts main characteristics to core

netburst _ core
double pumped alus = nope
low ipc = high ipc
high clockspeeds = low clockspeeds
tiny l1 cache = large l1 cache
huge l2 cache = medium l2 cache
hyper threading = nope
quad pumped bus = yes

the only thing core and netburst have in common is that they are intel processors and that they use the same system interface... and you really cant expect to change the interface AND the architecture at the same time, that would be like asking for trouble.
I agree. Core(Banias) is based on Pentium 3 and have the Pentium4 interface (quad pumped FSB), but it is a completely redesigned architecture with a lot of improvements. Compared to P3, Banias has better decoding, issuing and much better branch predictor, SSE2 support, more energy saving states and new and larger cache with energy saving features.



id say:

banias = p6 1.10
dothan p6 1.11
yonah = p6 1.20
core = p6 v1.21
core2 = p6 v1.22
nehalem = p6 1.3


Raptor22;2890376']P6 1.0 was Pentium Pro
P6 1.02 Was Pentium II
P6 1.05 was early Pentium III
P6 1.08 was PIII-s

Its all the same


It's not all the same, but all are based on a same architecture. There is huge difference between Pentium Pro and Core.

I'd say:

Pentium Pro = P6 v1.0 (new design)
Pentium II (Klamath, Deschutes) = P6 v1.1 (MMX support and faster interface)
Pentium III (Katmai) = P6 v1.2 (SSE support)
Pentium III (Coppermine) = P6 v1.3 (faster and smaller on-die L2, faster FSB)
Pentium III (Tualatin) = P6 v1.4 (larger L2)
Core (Banias) = P6 v2 (completely redesigned PIII, new interface, SSE2, power saving features, larger L2)
Core (Dothan) = P6 v2.1 (architectural tweaks and larger L2)
Core (Yonah) = P6 v2.2 (dual core, architectural tweaks, new and shared L2)
Core2 (Conroe) = P6 v3.0 (completely redesigned Core m-arch, faster interface, wider execution, lots of improvements and tweaks, SSSE3, larger and faster L2, etc)
Core2 (Penryn) = P6 v3.1 (architectural improvements, SSE4, larger L2)
Core3 (Nehalem) = P6 v4.0 (completely redesigned Core2 m-arch, lots of architectural improvements and tweaks, new interface, ODMCs, HT, new level of cache, etc.)

To say that these are all the same it's like saying that a Golf1 is the same as Golf5.

[[XC] gomeler]

I'd say:
Pentium Pro: my design, they stole it, recurring trend.
Pentium II : Gomelerx86 v1.66
Pentium III : Gomelerx86 v2.33
Core : Gomeler_Litex86 v1.45
Core2 : Gomeler_Beefcakex64 v1.99
Core2(45nm) : Gomeler_LiteCakex64 v1.05
Core3 : Gomeler_LeanBeefCake v1.07

[Brother Esau]

Why has this turned into yet another Intel Discussion? Could you guys please get a life and back off for once?:rolleyes:

[[XC] gomeler]

Why must you always point out that someone turns into an Intel discussion? Considering how this is a thread about a completely fake news post, perhaps you can have some leniency in your patrolling of the forums and let us have a little field day?

*rawr* Gomeler needs more tea

[_hiVe]

I really loved my K6-2!
It was the beginning of a story^^

The first CPU I've tried and succeded OCing. Up to 600mhz,crazy volts, crazy speed at that time.

Surely if there would be a higher divider and I'd perhaps had one of those K6-3's or K6-2+'s engraved on 180micron technology 600+++ wouldnt have posed a problem ;)

[cky2k6]

its a fake news post, but it does hold water in the grand scheme... remember about the whole vision that both intel and amd share on how multithreading will lead to simplified cores, but a whole boatload of them? god knows what design will be actually used, but a 16 core cpu with 2 gpus, possibly one or two complex cpu cores, and the rest being simple "dumb" cores seems like where we're going... the whole k6 scenario was just them poking fun at this concept.

[xlink]

core =! p6 plus netburst!

lets compare netbursts main characteristics to core

netburst _ core
double pumped alus = nope
low ipc = high ipc
high clockspeeds = low clockspeeds
tiny l1 cache = large l1 cache
huge l2 cache = medium l2 cache
hyper threading = nope
quad pumped bus = yes

the only thing core and netburst have in common is that they are intel processors and that they use the same system interface... and you really cant expect to change the interface AND the architecture at the same time, that would be like asking for trouble.

id say:

banias = p6 1.10
dothan p6 1.11
yonah = p6 1.20
core = p6 v1.21
core2 = p6 v1.22
nehalem = p6 1.3

think more along the lines of sex. traits from both will be present in the offspring but not all.

in this case netburst was the lesser partner. and FYI prescott had A LOT OF OPTIMIZATIONS TO IT. prescott was almost as fast per clock as northwood despite a notably longer pipeline. Core(the uarch not the chip) has similar branch prediction, a lot of various teaks from prescott, and it's overall architecture bears a lot of resemblance to P6. Yes there are new things not present in the other two older uarchs, but Core for the most part bears a great deal of similarities. FYI most of what you listed are superfluous things which don't bear THAT much significance on actual core architecture, in some regards it's safe to say that cache architecture is separate from the actual core architecture. Also IPC on netburst wasn't that bad I believe it was about on par with k7(could be wrong and I'm willing to admit it), it was performance/clock and that arose due to inefficiencies in overall design. FYI core has some pretty high clock speeds too, it's only around 20% short of prescott when it comes to air.


its a fake news post, but it does hold water in the grand scheme... remember about the whole vision that both intel and amd share on how multithreading will lead to simplified cores, but a whole boatload of them? god knows what design will be actually used, but a 16 core cpu with 2 gpus, possibly one or two complex cpu cores, and the rest being simple "dumb" cores seems like where we're going... the whole k6 scenario was just them poking fun at this concept.
GPUs are becoming more CPU-like and CPUs are becoming more GPU-like if you hadn't noticed. I'm just waiting for a true asymmetrical architecture.

AND FYI I'm still thinking that nehalem will bear more resemblence to northwood than many here think. Really, intel has mroe than oen design team, what do you think the netburst team has been doing the last two years?


regardless, AMD HAD a winner with k6 back in the day and I'd love to see them use all of their resources to their advantage

[Ub3r-L33ch]

Good thing we have a bunch of computer engineers on the forums that know how cpu architecture works and can explain all this stuff to us :D

[xlink]

Good thing we have a bunch of computer engineers on the forums that know how cpu architecture works and can explain all this stuff to us :D

mostly people with too much free time, and a good understanding of basic concepts.

if i were an actual hardware engineer I'd know a hell of a lot more, most of the stuff people say here involve just basic knowledge from an engineering standpoint.