IBM Stacking Chips for Greater Efficiency - Dailytech

[Frank M]

http://www.dailytech.com/article.aspx?newsid=6905

I think it was about time to bring chip designing to a higher level of 3D.

[SnipingWaste]

Yaaa for old tech. IBM finally discovers bump bonding, the same thing TI has done in the mid 80's and many other companies that that have there own fabs. The other companies stop using this years ago and has gone one way beyond this. Sorry, I can't say what it is.

[nn_step]

already posted
http://xtremesystems.org/forums/showthread.php?t=140518

[Pinnacle]

:slapass:

POOOOSSTTEEED

:)

[Frank M]

Ooops... :slap:
Different article, though... and I've got die shots! :fact: :D

[zabomb4163]

http://arstechnica.com/news.ars/post/20060926-7840.html
http://www.technologynewsdaily.com/node/5971

intel actually demonstrated the technology on an 80 core processor last year. poor IBM

"The TSVs are a kind of 3D interconnect technology that involves stacking chips directly on top of each other. There contacts on the adjacent faces of each chip that act as vertical wires, or "vias," and that connect the two chips together. To get a mental picture of what I'm describing, just think of a Dagwood sandwich with toothpicks sticking in it, such that the different layers of the sandwich are connected via the toothpicks. The layers of the sandwich (bread, meat, lettuce, etc.) would be the silicon chips, and the toothpicks would be the wires that the chips use to talk to each other. Now, imagine a side of chips with the sandwich...

Anyway, by stacking memory directly on top of a massively multicore processor and then having wires come up through the different points of the processor and connect directly to the memory chip, Intel claims that they can get transfer rates between the processor and memory of up to a terabyte per second. "

[ColonelCain]

How do you cope with the heat? Thats what I'm wondering